RFNoC Neural Network Library using Vivado HLS

Abstract

The FPGA-based neural network library presented here provides an RF-Network on Chip (RFNoC) out-of-tree (OOT) module for efficiently deploying a trained neural network to an FPGA. The neural network module (rfnoc-hls-neuralnet) exposes a library of pre-optimized C++ neural network building blocks designed for the Vivado HLS tool. RFNoC provides a convenient input/output interface between hardware and software that is compatible with gnuradio. Ideally, the neural network designer will be able to deploy neural networks and evaluate resource vs. throughput tradeoffs without needing to develop and maintain repetitive "glue code" in FPGA and software. Presented examples demonstrate various use-cases in a simulation environment and on the E310, including image classification and modulation recognition, using both fully-connected and convolutional layers.